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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
Functions</h2></td></tr>
<tr class="memitem:ga3416ce41bac7a473de1c1b9665019800"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmi__dcdma.html#ga3416ce41bac7a473de1c1b9665019800">XDcDma_CfgInitialize</a> (<a class="el" href="struct_x_dc_dma.html">XDcDma</a> *InstancePtr, u32 BaseAddr)</td></tr>
<tr class="memdesc:ga3416ce41bac7a473de1c1b9665019800"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function initializes the configuration for the DcDma Instance.  <a href="#ga3416ce41bac7a473de1c1b9665019800">More...</a><br/></td></tr>
<tr class="separator:ga3416ce41bac7a473de1c1b9665019800"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga406539d327e2a84079b1105fc64465ba"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmi__dcdma.html#ga406539d327e2a84079b1105fc64465ba">XDcDma_WriteProtEnable</a> (<a class="el" href="struct_x_dc_dma.html">XDcDma</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga406539d327e2a84079b1105fc64465ba"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function enables the write protection for DCDMA registers.  <a href="#ga406539d327e2a84079b1105fc64465ba">More...</a><br/></td></tr>
<tr class="separator:ga406539d327e2a84079b1105fc64465ba"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5d173da16718d01d9ef53fc5d424678a"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmi__dcdma.html#ga5d173da16718d01d9ef53fc5d424678a">XDcDma_WriteProtDisable</a> (<a class="el" href="struct_x_dc_dma.html">XDcDma</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga5d173da16718d01d9ef53fc5d424678a"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function disables the write protection for DCDMA registers.  <a href="#ga5d173da16718d01d9ef53fc5d424678a">More...</a><br/></td></tr>
<tr class="separator:ga5d173da16718d01d9ef53fc5d424678a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga91f1b1f6e28e522f43cd33bb8a17a4f9"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmi__dcdma.html#ga91f1b1f6e28e522f43cd33bb8a17a4f9">XDCDma_GetWriteProt</a> (<a class="el" href="struct_x_dc_dma.html">XDcDma</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga91f1b1f6e28e522f43cd33bb8a17a4f9"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function programs the DPDMA_GLBL register with trigger channels.  <a href="#ga91f1b1f6e28e522f43cd33bb8a17a4f9">More...</a><br/></td></tr>
<tr class="separator:ga91f1b1f6e28e522f43cd33bb8a17a4f9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabc7c14d891e4136ce8c504151deeda69"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmi__dcdma.html#gabc7c14d891e4136ce8c504151deeda69">XDcDma_SetDescDelay</a> (<a class="el" href="struct_x_dc_dma.html">XDcDma</a> *InstancePtr, XDcDma_ChannelId Id, u16 Val)</td></tr>
<tr class="memdesc:gabc7c14d891e4136ce8c504151deeda69"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function programs the Desc Delay for required channel.  <a href="#gabc7c14d891e4136ce8c504151deeda69">More...</a><br/></td></tr>
<tr class="separator:gabc7c14d891e4136ce8c504151deeda69"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac128f4e7ac7421d2dfafe00c784d5990"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmi__dcdma.html#gac128f4e7ac7421d2dfafe00c784d5990">XDcDma_SetDataQoS</a> (<a class="el" href="struct_x_dc_dma.html">XDcDma</a> *InstancePtr, <a class="el" href="xdcdma_8h.html#a2dd49d46f9f7bb0d7ed7afc817d68307">XDcDma_ChannelType</a> Channel, u8 Val)</td></tr>
<tr class="memdesc:gac128f4e7ac7421d2dfafe00c784d5990"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function programs the data QoS for a channel.  <a href="#gac128f4e7ac7421d2dfafe00c784d5990">More...</a><br/></td></tr>
<tr class="separator:gac128f4e7ac7421d2dfafe00c784d5990"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga292c45343371203644273eb47c9fbd4d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmi__dcdma.html#ga292c45343371203644273eb47c9fbd4d">XDcDma_SetDescQoS</a> (<a class="el" href="struct_x_dc_dma.html">XDcDma</a> *InstancePtr, <a class="el" href="xdcdma_8h.html#a2dd49d46f9f7bb0d7ed7afc817d68307">XDcDma_ChannelType</a> Channel, u8 Val)</td></tr>
<tr class="memdesc:ga292c45343371203644273eb47c9fbd4d"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function programs the DPDMA_GLBL register with trigger channels.  <a href="#ga292c45343371203644273eb47c9fbd4d">More...</a><br/></td></tr>
<tr class="separator:ga292c45343371203644273eb47c9fbd4d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga08fe48548a67b91d7eeadea4ae85b908"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmi__dcdma.html#ga08fe48548a67b91d7eeadea4ae85b908">XDcDma_SetAxCache</a> (<a class="el" href="struct_x_dc_dma.html">XDcDma</a> *InstancePtr, XDcDma_ChannelId Id, u8 Val)</td></tr>
<tr class="memdesc:ga08fe48548a67b91d7eeadea4ae85b908"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function programs the Ax Cache register for specific channel.  <a href="#ga08fe48548a67b91d7eeadea4ae85b908">More...</a><br/></td></tr>
<tr class="separator:ga08fe48548a67b91d7eeadea4ae85b908"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad05901557988e38b788efcb691a179a2"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmi__dcdma.html#gad05901557988e38b788efcb691a179a2">XDcDma_SetAxProt</a> (<a class="el" href="struct_x_dc_dma.html">XDcDma</a> *InstancePtr, XDcDma_ChannelId Id, u8 Val)</td></tr>
<tr class="memdesc:gad05901557988e38b788efcb691a179a2"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function programs the AxProt register for specific channel.  <a href="#gad05901557988e38b788efcb691a179a2">More...</a><br/></td></tr>
<tr class="separator:gad05901557988e38b788efcb691a179a2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga93387eeab9e483b1dd0c30c890d6e501"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmi__dcdma.html#ga93387eeab9e483b1dd0c30c890d6e501">XDcDma_ConfigChannelState</a> (<a class="el" href="struct_x_dc_dma.html">XDcDma</a> *InstancePtr, XDcDma_ChannelId Id, XDcDma_State Enable)</td></tr>
<tr class="memdesc:ga93387eeab9e483b1dd0c30c890d6e501"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function programs the channel state as enable, disable or idle.  <a href="#ga93387eeab9e483b1dd0c30c890d6e501">More...</a><br/></td></tr>
<tr class="separator:ga93387eeab9e483b1dd0c30c890d6e501"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabbe395a1ddd2a306a4afd940b6acfdda"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmi__dcdma.html#gabbe395a1ddd2a306a4afd940b6acfdda">XDcDma_WaitPendingTransaction</a> (<a class="el" href="struct_x_dc_dma.html">XDcDma</a> *InstancePtr, XDcDma_ChannelId Id)</td></tr>
<tr class="memdesc:gabbe395a1ddd2a306a4afd940b6acfdda"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function checks for any pending transactions for a given channel.  <a href="#gabbe395a1ddd2a306a4afd940b6acfdda">More...</a><br/></td></tr>
<tr class="separator:gabbe395a1ddd2a306a4afd940b6acfdda"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4349a3332fbf75d1be2ce9accb7082f6"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmi__dcdma.html#ga4349a3332fbf75d1be2ce9accb7082f6">XDCDma_GetOutstandingTxn</a> (<a class="el" href="struct_x_dc_dma.html">XDcDma</a> *InstancePtr, XDcDma_ChannelId Id)</td></tr>
<tr class="memdesc:ga4349a3332fbf75d1be2ce9accb7082f6"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function programs the DPDMA_GLBL register with trigger channels.  <a href="#ga4349a3332fbf75d1be2ce9accb7082f6">More...</a><br/></td></tr>
<tr class="separator:ga4349a3332fbf75d1be2ce9accb7082f6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga178425efb51b5e613b27cdd6eac15a59"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmi__dcdma.html#ga178425efb51b5e613b27cdd6eac15a59">XDcDma_InterruptEnable</a> (<a class="el" href="struct_x_dc_dma.html">XDcDma</a> *InstancePtr, u32 Mask)</td></tr>
<tr class="memdesc:ga178425efb51b5e613b27cdd6eac15a59"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function enables the interrupt.  <a href="#ga178425efb51b5e613b27cdd6eac15a59">More...</a><br/></td></tr>
<tr class="separator:ga178425efb51b5e613b27cdd6eac15a59"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga00a98d41f9767c53fab0a3284f005e49"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmi__dcdma.html#ga00a98d41f9767c53fab0a3284f005e49">XDcDma_InterruptDisable</a> (<a class="el" href="struct_x_dc_dma.html">XDcDma</a> *InstancePtr, u32 Mask)</td></tr>
<tr class="memdesc:ga00a98d41f9767c53fab0a3284f005e49"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function disables the interrupt.  <a href="#ga00a98d41f9767c53fab0a3284f005e49">More...</a><br/></td></tr>
<tr class="separator:ga00a98d41f9767c53fab0a3284f005e49"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga153e5abe962b93c6ee19741da7f150ed"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmi__dcdma.html#ga153e5abe962b93c6ee19741da7f150ed">XDcDma_SetCallBack</a> (<a class="el" href="struct_x_dc_dma.html">XDcDma</a> *InstancePtr, XDcDma_IntHandlerType HandlerType, void *CallbackFunc, void *CallbackRef)</td></tr>
<tr class="memdesc:ga153e5abe962b93c6ee19741da7f150ed"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the callback for different interrupt handlers.  <a href="#ga153e5abe962b93c6ee19741da7f150ed">More...</a><br/></td></tr>
<tr class="separator:ga153e5abe962b93c6ee19741da7f150ed"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab566cabb8dd713e5aa4c1e41e82d9c35"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmi__dcdma.html#gab566cabb8dd713e5aa4c1e41e82d9c35">XDcDma_Trigger</a> (<a class="el" href="struct_x_dc_dma.html">XDcDma</a> *InstancePtr, <a class="el" href="xdcdma_8h.html#a2dd49d46f9f7bb0d7ed7afc817d68307">XDcDma_ChannelType</a> Channel)</td></tr>
<tr class="memdesc:gab566cabb8dd713e5aa4c1e41e82d9c35"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function programs the DPDMA_GLBL register with trigger channels.  <a href="#gab566cabb8dd713e5aa4c1e41e82d9c35">More...</a><br/></td></tr>
<tr class="separator:gab566cabb8dd713e5aa4c1e41e82d9c35"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad0608c2fb88769d23b5e9d8d40a260e3"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmi__dcdma.html#gad0608c2fb88769d23b5e9d8d40a260e3">XDcDma_ReTrigger</a> (<a class="el" href="struct_x_dc_dma.html">XDcDma</a> *InstancePtr, <a class="el" href="xdcdma_8h.html#a2dd49d46f9f7bb0d7ed7afc817d68307">XDcDma_ChannelType</a> Channel)</td></tr>
<tr class="memdesc:gad0608c2fb88769d23b5e9d8d40a260e3"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function programs the DPDMA_GLBL register with retrigger channels.  <a href="#gad0608c2fb88769d23b5e9d8d40a260e3">More...</a><br/></td></tr>
<tr class="separator:gad0608c2fb88769d23b5e9d8d40a260e3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga34970edec008b2d87dfb528dc57ff180"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmi__dcdma.html#ga34970edec008b2d87dfb528dc57ff180">XDcDma_InterruptHandler</a> (<a class="el" href="struct_x_dc_dma.html">XDcDma</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga34970edec008b2d87dfb528dc57ff180"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function calls the VsyncInterrupt Handler.  <a href="#ga34970edec008b2d87dfb528dc57ff180">More...</a><br/></td></tr>
<tr class="separator:ga34970edec008b2d87dfb528dc57ff180"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga731efbd7eed1559de335f1e93dd6ac1c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmi__dcdma.html#ga731efbd7eed1559de335f1e93dd6ac1c">XDcDma_VSyncHandler</a> (<a class="el" href="struct_x_dc_dma.html">XDcDma</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga731efbd7eed1559de335f1e93dd6ac1c"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function services the VsyncInterrupt.  <a href="#ga731efbd7eed1559de335f1e93dd6ac1c">More...</a><br/></td></tr>
<tr class="separator:ga731efbd7eed1559de335f1e93dd6ac1c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga60e5ca11878233ce1128eb6dd13c0ee3"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmi__dcdma.html#ga60e5ca11878233ce1128eb6dd13c0ee3">XDcDma_SetupChannel</a> (<a class="el" href="struct_x_dc_dma.html">XDcDma</a> *InstancePtr, <a class="el" href="xdcdma_8h.html#a2dd49d46f9f7bb0d7ed7afc817d68307">XDcDma_ChannelType</a> Channel)</td></tr>
<tr class="memdesc:ga60e5ca11878233ce1128eb6dd13c0ee3"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the descriptor address for each video stream.  <a href="#ga60e5ca11878233ce1128eb6dd13c0ee3">More...</a><br/></td></tr>
<tr class="separator:ga60e5ca11878233ce1128eb6dd13c0ee3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga83715748f55fe649eefc6d6a7e091dfd"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmi__dcdma.html#ga83715748f55fe649eefc6d6a7e091dfd">XDcDma_DescInit</a> (XDcDma_Descriptor *XDesc)</td></tr>
<tr class="memdesc:ga83715748f55fe649eefc6d6a7e091dfd"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function creates the descriptor for the DcDma Instance.  <a href="#ga83715748f55fe649eefc6d6a7e091dfd">More...</a><br/></td></tr>
<tr class="separator:ga83715748f55fe649eefc6d6a7e091dfd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaba2c3b0d2480b34ccad95c9fdd7f5478"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mmi__dcdma.html#gaba2c3b0d2480b34ccad95c9fdd7f5478">XDcDma_GetNewDescId</a> (<a class="el" href="struct_x_dc_dma.html">XDcDma</a> *InstancePtr)</td></tr>
<tr class="memdesc:gaba2c3b0d2480b34ccad95c9fdd7f5478"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function incremeants the LastDescId of DcDma Instance.  <a href="#gaba2c3b0d2480b34ccad95c9fdd7f5478">More...</a><br/></td></tr>
<tr class="separator:gaba2c3b0d2480b34ccad95c9fdd7f5478"><td class="memSeparator" colspan="2">&#160;</td></tr>
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<h2 class="groupheader">Function Documentation</h2>
<a class="anchor" id="ga3416ce41bac7a473de1c1b9665019800"></a>
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          <td class="memname">void XDcDma_CfgInitialize </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dc_dma.html">XDcDma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>BaseAddr</em>&#160;</td>
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          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
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<p>This function initializes the configuration for the DcDma Instance. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dc_dma.html" title="This typedef defines the DCDMA configration. ">XDcDma</a> instance. </td></tr>
    <tr><td class="paramname">BaseAddr</td><td>sets the base address of the DcDma instance</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>Base address and DeviceId is same as the Dc Timing driver. </dd></dl>

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          <td class="memname">u32 XDcDma_ConfigChannelState </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dc_dma.html">XDcDma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XDcDma_ChannelId&#160;</td>
          <td class="paramname"><em>Id</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XDcDma_State&#160;</td>
          <td class="paramname"><em>Enable</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>This function programs the channel state as enable, disable or idle. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dc_dma.html" title="This typedef defines the DCDMA configration. ">XDcDma</a> instance. </td></tr>
    <tr><td class="paramname">ChannelId</td><td>is channel to configure </td></tr>
    <tr><td class="paramname">Enable</td><td>sets the channel state.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>XST_SUCCESS or XST_FAILURE. </dd></dl>

<p>References <a class="el" href="xdcdma__hw_8h.html#a44349300579652c75823207d428b6824">XDCDMA_CH0_CNTL</a>, <a class="el" href="group__mmi__dcdma.html#ga93387eeab9e483b1dd0c30c890d6e501">XDcDma_ConfigChannelState()</a>, <a class="el" href="xdcdma__hw_8h.html#aa9645c91ffb6f0f4bb04755715512e58">XDcDma_ReadModifyWrite</a>, and <a class="el" href="group__mmi__dcdma.html#gabbe395a1ddd2a306a4afd940b6acfdda">XDcDma_WaitPendingTransaction()</a>.</p>

<p>Referenced by <a class="el" href="group__mmi__dcdma.html#ga93387eeab9e483b1dd0c30c890d6e501">XDcDma_ConfigChannelState()</a>, and <a class="el" href="group__mmi__dcdma.html#ga731efbd7eed1559de335f1e93dd6ac1c">XDcDma_VSyncHandler()</a>.</p>

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          <td class="memname">void XDcDma_DescInit </td>
          <td>(</td>
          <td class="paramtype">XDcDma_Descriptor *&#160;</td>
          <td class="paramname"><em>XDesc</em></td><td>)</td>
          <td></td>
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<p>This function creates the descriptor for the DcDma Instance. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dc_dma.html" title="This typedef defines the DCDMA configration. ">XDcDma</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None. </dd></dl>

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          <td class="memname">u32 XDcDma_GetNewDescId </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dc_dma.html">XDcDma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>This function incremeants the LastDescId of DcDma Instance. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dc_dma.html" title="This typedef defines the DCDMA configration. ">XDcDma</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>Updated LastDescId. </dd></dl>

<p>References <a class="el" href="struct_x_dc_dma.html#a43095e622f6bb0153c07149129ec6633">XDcDma::LastDescId</a>.</p>

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          <td class="memname">u32 XDCDma_GetOutstandingTxn </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dc_dma.html">XDcDma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XDcDma_ChannelId&#160;</td>
          <td class="paramname"><em>Id</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>This function programs the DPDMA_GLBL register with trigger channels. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dc_dma.html" title="This typedef defines the DCDMA configration. ">XDcDma</a> instance. </td></tr>
    <tr><td class="paramname">Channel</td><td>Id is channel number.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>XST_SUCCESS or XST_FAILURE. </dd></dl>

<p>References <a class="el" href="xdcdma__hw_8h.html#a8a10fd4606e24d0e3131f1bffa2eb231">XDCDMA_CH0_STATUS</a>, and <a class="el" href="xdcdma__hw_8h.html#a6bca22d1b884f430c95c6755fdc9ff59">XDcDma_ReadReg</a>.</p>

<p>Referenced by <a class="el" href="group__mmi__dcdma.html#gabbe395a1ddd2a306a4afd940b6acfdda">XDcDma_WaitPendingTransaction()</a>.</p>

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          <td class="memname">u32 XDCDma_GetWriteProt </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dc_dma.html">XDcDma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>This function programs the DPDMA_GLBL register with trigger channels. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dc_dma.html" title="This typedef defines the DCDMA configration. ">XDcDma</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>XST_SUCCESS or XST_FAILURE. </dd></dl>

<p>References <a class="el" href="xdcdma__hw_8h.html#a6bca22d1b884f430c95c6755fdc9ff59">XDcDma_ReadReg</a>, and <a class="el" href="xdcdma__hw_8h.html#a601798789882440402a8ae218b59c442">XDCDMA_WPROTS</a>.</p>

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          <td class="memname">void XDcDma_InterruptDisable </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dc_dma.html">XDcDma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>Mask</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>This function disables the interrupt. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dc_dma.html" title="This typedef defines the DCDMA configration. ">XDcDma</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None. </dd></dl>

<p>References <a class="el" href="xdcdma__hw_8h.html#a9d215a90fc7e95562adb843c7936a2ba">XDCDMA_MISC_IDR</a>, and <a class="el" href="xdcdma__hw_8h.html#a14cc73efebb537d35586569e9f64fd24">XDcDma_WriteReg</a>.</p>

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          <td class="memname">void XDcDma_InterruptEnable </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dc_dma.html">XDcDma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>Mask</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>This function enables the interrupt. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dc_dma.html" title="This typedef defines the DCDMA configration. ">XDcDma</a> instance. </td></tr>
    <tr><td class="paramname">Mask</td><td>is interrupt to unmask.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None. </dd></dl>

<p>References <a class="el" href="xdcdma__hw_8h.html#a4ab30311a6a69d413c2f7507e5e8cc9f">XDCDMA_MISC_IER</a>, <a class="el" href="xdcdma__hw_8h.html#aed9a4e3d3ce6f317f5530521096ca061">XDCDMA_MISC_ISR</a>, and <a class="el" href="xdcdma__hw_8h.html#a14cc73efebb537d35586569e9f64fd24">XDcDma_WriteReg</a>.</p>

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          <td class="memname">void XDcDma_InterruptHandler </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dc_dma.html">XDcDma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>This function calls the VsyncInterrupt Handler. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dc_dma.html" title="This typedef defines the DCDMA configration. ">XDcDma</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None. </dd></dl>

<p>References <a class="el" href="xdcdma__hw_8h.html#aed9a4e3d3ce6f317f5530521096ca061">XDCDMA_MISC_ISR</a>, <a class="el" href="xdcdma__hw_8h.html#a6bca22d1b884f430c95c6755fdc9ff59">XDcDma_ReadReg</a>, and <a class="el" href="group__mmi__dcdma.html#ga731efbd7eed1559de335f1e93dd6ac1c">XDcDma_VSyncHandler()</a>.</p>

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          <td class="memname">u32 XDcDma_ReTrigger </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dc_dma.html">XDcDma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="xdcdma_8h.html#a2dd49d46f9f7bb0d7ed7afc817d68307">XDcDma_ChannelType</a>&#160;</td>
          <td class="paramname"><em>Channel</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>This function programs the DPDMA_GLBL register with retrigger channels. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dc_dma.html" title="This typedef defines the DCDMA configration. ">XDcDma</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>XST_SUCCESS or XST_FAILURE. </dd></dl>

<p>References <a class="el" href="xdcdma__hw_8h.html#a13fb2099da9eb0e145e4551f03572908">XDCDMA_GBL</a>, and <a class="el" href="xdcdma__hw_8h.html#a14cc73efebb537d35586569e9f64fd24">XDcDma_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="group__mmi__dcdma.html#ga731efbd7eed1559de335f1e93dd6ac1c">XDcDma_VSyncHandler()</a>.</p>

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          <td class="memname">void XDcDma_SetAxCache </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dc_dma.html">XDcDma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XDcDma_ChannelId&#160;</td>
          <td class="paramname"><em>Id</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>Val</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>This function programs the Ax Cache register for specific channel. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dc_dma.html" title="This typedef defines the DCDMA configration. ">XDcDma</a> instance. </td></tr>
    <tr><td class="paramname">ChannelId</td><td>is channel number. </td></tr>
    <tr><td class="paramname">Val</td><td>to configure. </td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None. </dd></dl>

<p>References <a class="el" href="xdcdma__hw_8h.html#a44349300579652c75823207d428b6824">XDCDMA_CH0_CNTL</a>, and <a class="el" href="xdcdma__hw_8h.html#aa9645c91ffb6f0f4bb04755715512e58">XDcDma_ReadModifyWrite</a>.</p>

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          <td class="memname">void XDcDma_SetAxProt </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dc_dma.html">XDcDma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XDcDma_ChannelId&#160;</td>
          <td class="paramname"><em>Id</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>Val</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>This function programs the AxProt register for specific channel. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dc_dma.html" title="This typedef defines the DCDMA configration. ">XDcDma</a> instance. </td></tr>
    <tr><td class="paramname">ChannelId</td><td>is channel number. </td></tr>
    <tr><td class="paramname">Val</td><td>to configure.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None. </dd></dl>

<p>References <a class="el" href="xdcdma__hw_8h.html#a44349300579652c75823207d428b6824">XDCDMA_CH0_CNTL</a>, and <a class="el" href="xdcdma__hw_8h.html#aa9645c91ffb6f0f4bb04755715512e58">XDcDma_ReadModifyWrite</a>.</p>

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          <td class="memname">u32 XDcDma_SetCallBack </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dc_dma.html">XDcDma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XDcDma_IntHandlerType&#160;</td>
          <td class="paramname"><em>HandlerType</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">void *&#160;</td>
          <td class="paramname"><em>CallbackFunc</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">void *&#160;</td>
          <td class="paramname"><em>CallbackRef</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>This function sets the callback for different interrupt handlers. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dc_dma.html" title="This typedef defines the DCDMA configration. ">XDcDma</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>XST_SUCCESS or XST_FAILURE. </dd></dl>

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          <td class="memname">void XDcDma_SetDataQoS </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dc_dma.html">XDcDma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="xdcdma_8h.html#a2dd49d46f9f7bb0d7ed7afc817d68307">XDcDma_ChannelType</a>&#160;</td>
          <td class="paramname"><em>Channel</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>Val</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>This function programs the data QoS for a channel. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dc_dma.html" title="This typedef defines the DCDMA configration. ">XDcDma</a> instance. </td></tr>
    <tr><td class="paramname">ChannelType</td><td>is channel number. </td></tr>
    <tr><td class="paramname">Val</td><td>to configure.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None. </dd></dl>

<p>References <a class="el" href="xdcdma__hw_8h.html#a44349300579652c75823207d428b6824">XDCDMA_CH0_CNTL</a>, and <a class="el" href="xdcdma__hw_8h.html#aa9645c91ffb6f0f4bb04755715512e58">XDcDma_ReadModifyWrite</a>.</p>

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          <td class="memname">void XDcDma_SetDescDelay </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dc_dma.html">XDcDma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XDcDma_ChannelId&#160;</td>
          <td class="paramname"><em>Id</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u16&#160;</td>
          <td class="paramname"><em>Val</em>&#160;</td>
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        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
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<p>This function programs the Desc Delay for required channel. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dc_dma.html" title="This typedef defines the DCDMA configration. ">XDcDma</a> instance. </td></tr>
    <tr><td class="paramname">Channel</td><td>ID </td></tr>
    <tr><td class="paramname">Val</td><td>specifies desc delay</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None. </dd></dl>

<p>References <a class="el" href="xdcdma__hw_8h.html#a44349300579652c75823207d428b6824">XDCDMA_CH0_CNTL</a>, and <a class="el" href="xdcdma__hw_8h.html#aa9645c91ffb6f0f4bb04755715512e58">XDcDma_ReadModifyWrite</a>.</p>

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          <td class="memname">void XDcDma_SetDescQoS </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dc_dma.html">XDcDma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="xdcdma_8h.html#a2dd49d46f9f7bb0d7ed7afc817d68307">XDcDma_ChannelType</a>&#160;</td>
          <td class="paramname"><em>Channel</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>Val</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>This function programs the DPDMA_GLBL register with trigger channels. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dc_dma.html" title="This typedef defines the DCDMA configration. ">XDcDma</a> instance. </td></tr>
    <tr><td class="paramname">ChannelType</td><td>is channel number. </td></tr>
    <tr><td class="paramname">Val</td><td>to configure. </td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None. </dd></dl>

<p>References <a class="el" href="xdcdma__hw_8h.html#a44349300579652c75823207d428b6824">XDCDMA_CH0_CNTL</a>, and <a class="el" href="xdcdma__hw_8h.html#aa9645c91ffb6f0f4bb04755715512e58">XDcDma_ReadModifyWrite</a>.</p>

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          <td class="memname">void XDcDma_SetupChannel </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dc_dma.html">XDcDma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="xdcdma_8h.html#a2dd49d46f9f7bb0d7ed7afc817d68307">XDcDma_ChannelType</a>&#160;</td>
          <td class="paramname"><em>Channel</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>This function sets the descriptor address for each video stream. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dc_dma.html" title="This typedef defines the DCDMA configration. ">XDcDma</a> instance. </td></tr>
    <tr><td class="paramname">Channel</td><td>type</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None. </dd></dl>

<p>Referenced by <a class="el" href="group__mmi__dcdma.html#ga731efbd7eed1559de335f1e93dd6ac1c">XDcDma_VSyncHandler()</a>.</p>

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          <td class="memname">u32 XDcDma_Trigger </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dc_dma.html">XDcDma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="xdcdma_8h.html#a2dd49d46f9f7bb0d7ed7afc817d68307">XDcDma_ChannelType</a>&#160;</td>
          <td class="paramname"><em>Channel</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function programs the DPDMA_GLBL register with trigger channels. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dc_dma.html" title="This typedef defines the DCDMA configration. ">XDcDma</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>XST_SUCCESS or XST_FAILURE. </dd></dl>

<p>Referenced by <a class="el" href="group__mmi__dcdma.html#ga731efbd7eed1559de335f1e93dd6ac1c">XDcDma_VSyncHandler()</a>.</p>

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          <td class="memname">void XDcDma_VSyncHandler </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dc_dma.html">XDcDma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>This function services the VsyncInterrupt. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dc_dma.html" title="This typedef defines the DCDMA configration. ">XDcDma</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None. </dd></dl>

<p>References <a class="el" href="group__mmi__dcdma.html#ga93387eeab9e483b1dd0c30c890d6e501">XDcDma_ConfigChannelState()</a>, <a class="el" href="xdcdma__hw_8h.html#a13fb2099da9eb0e145e4551f03572908">XDCDMA_GBL</a>, <a class="el" href="xdcdma__hw_8h.html#aed9a4e3d3ce6f317f5530521096ca061">XDCDMA_MISC_ISR</a>, <a class="el" href="group__mmi__dcdma.html#gad0608c2fb88769d23b5e9d8d40a260e3">XDcDma_ReTrigger()</a>, <a class="el" href="group__mmi__dcdma.html#ga60e5ca11878233ce1128eb6dd13c0ee3">XDcDma_SetupChannel()</a>, <a class="el" href="group__mmi__dcdma.html#gab566cabb8dd713e5aa4c1e41e82d9c35">XDcDma_Trigger()</a>, and <a class="el" href="xdcdma__hw_8h.html#a14cc73efebb537d35586569e9f64fd24">XDcDma_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="group__mmi__dcdma.html#ga34970edec008b2d87dfb528dc57ff180">XDcDma_InterruptHandler()</a>.</p>

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          <td class="memname">u32 XDcDma_WaitPendingTransaction </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dc_dma.html">XDcDma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XDcDma_ChannelId&#160;</td>
          <td class="paramname"><em>Id</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>This function checks for any pending transactions for a given channel. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dc_dma.html" title="This typedef defines the DCDMA configration. ">XDcDma</a> instance. </td></tr>
    <tr><td class="paramname">Channel</td><td>Id is channel number</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>XST_SUCCESS or XST_FAILURE. </dd></dl>

<p>References <a class="el" href="group__mmi__dcdma.html#ga4349a3332fbf75d1be2ce9accb7082f6">XDCDma_GetOutstandingTxn()</a>.</p>

<p>Referenced by <a class="el" href="group__mmi__dcdma.html#ga93387eeab9e483b1dd0c30c890d6e501">XDcDma_ConfigChannelState()</a>.</p>

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          <td class="memname">void XDcDma_WriteProtDisable </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dc_dma.html">XDcDma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>This function disables the write protection for DCDMA registers. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dc_dma.html" title="This typedef defines the DCDMA configration. ">XDcDma</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None. </dd></dl>

<p>References <a class="el" href="xdcdma__hw_8h.html#a601798789882440402a8ae218b59c442">XDCDMA_WPROTS</a>, and <a class="el" href="xdcdma__hw_8h.html#a14cc73efebb537d35586569e9f64fd24">XDcDma_WriteReg</a>.</p>

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          <td class="memname">void XDcDma_WriteProtEnable </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dc_dma.html">XDcDma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>This function enables the write protection for DCDMA registers. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dc_dma.html" title="This typedef defines the DCDMA configration. ">XDcDma</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None. </dd></dl>

<p>References <a class="el" href="xdcdma__hw_8h.html#a601798789882440402a8ae218b59c442">XDCDMA_WPROTS</a>, and <a class="el" href="xdcdma__hw_8h.html#a14cc73efebb537d35586569e9f64fd24">XDcDma_WriteReg</a>.</p>

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